Analog techniques have dominated signal processing for years, but digital techniques are slowly encroaching into this domain. The design of sigma-delta (ΣΔ) analog-to-digital converters (ADCs) is approximately three-quarters digital and one-quarter analog. ΣΔ ADCs are now ideal for converting analog signals over a wide range of frequencies, from DC to several megahertz. Basically, these converters comprise an oversampling modulator followed by a decimation filter that together produce a high-resolution data-stream output.
The rudimentary ΣΔ converter is a 1-bit sampling system. An analog signal applied to the input of the converter is sampled multiple times, a technique known as oversampling. The sampling rate may be hundreds of times faster than the digital results at the output ports. Each individual sample may be accumulated over time and “averaged” with the other input-signal samples through the decimation filter. The decimation filter typically consumes high power since they operate at very high operating frequency typically few hundreds of MHz to a few GHz. There are heretofore unaddressed needs with previous decimation filter solutions.